The present invention relates to composite video encoders, and more particularly, to a composite video encoder capable of converting digital RGB (red, green, and blue) signals such as generated by high color resolution TV game machines into analog composite video signals that can be accepted by TV systems of any of several standards including NTSC-M, NTSC 4.43/50, NTSC 4.43/60, PAL-B/G/I/D, PAL-M and PAL-N.
Specifications of the above-mentioned six standards are listed in the Table 1.
Prior Art ROC Patent No. 60267 teaches a multi-standard composite video encoder, which produces poor image quality with high cost circuits.
Accordingly, it is a primary objective of the present invention to provide a digital multi-standard TV game composite video encoder that avoids the disadvantages in the prior art.
To achieve the foregoing objective, the digital multi-standard TV game composite video encoder according to the present invention is provided for use with high color resolution TV game machine. The encoder is combined with part of the game machine in an integrated circuit having peripheral components including:
a crystal oscillator chip, a second capacitor, and three jump lines for selection of any one of the above six different NTSC and PAL systems; PA1 first capacitor of fixed capacitance for use in a phase-locked circuit filtering; PA1 a switching circuit and first and second resistors for selection of signals to produce SVHS signals having separation between luminance and chrominance signals or composite video signals having combined luminance and chrominance signals; PA1 a third resistor for controlling current flow a in digital-to-analog converter; and PA1 a third capacitor and a fourth capacitor for use as filters in an analog power source and; PA1 and encoder having a portion in the integrated circuit, which comprises:
an RGB color difference signal converter, that accepts the RGB signals generated by the game machine, a negative blanking signal, and video sampling clock signal for converting the RGB signals respectively into a composite luminance signal, a red weighted color difference signal, and a blue weighted color difference signal; PA2 a multi-system signal generator for generating four four-quadrant subcarrier and chrominance-sampling clock signals, and generating a horizontal phase-lock reference signal for a phase-lock loop circuit; PA2 a composite chrominance signal generator that combines the blue weighted color difference signal and red weighted color difference signal with a composite color burst gate signal and four-quadrant subcarrier to generate a composite chrominance signal containing color burst; PA2 a bandpass filter that accepts the composite chrominance signal for producing a band-limited composite chrominance signal; PA2 a first digital-to analog converter for converting the band-limited composite chrominance signal into an analog current signal to build up an analog composite chrominance signal on the second resistor outside the integrated circuit; PA2 a synchronization signal inserter that accepts the luminance signal and the composite synchronization signal from the game machine for producing a composite luminance signal containing a composite synchronization signal; PA2 a low-pass filter that accepts the composite luminance signal for producing a band-limited composite luminance signal; PA2 a time delay circuit for matching the timing between the band-limited composite luminance signal and the band-limited composite chrominance signal; PA2 a second digital-to-analog converter for converting the time matched composite luminance signal into an analog current signal to build up an analog composite luminance signal on the first resistor outside the integrated circuit; and PA2 a phase-locked loop circuit that uses the horizontal synchronization signal generated by the game machines for phase-locking with the horizontal phase-locking reference signal generated by the multi-system signal generator a, to thereby generate high frequency clock signal required by the game machine and maintain a fixed ratio between the chrominance subcarrier frequency and horizontal synchronization signal frequency to reduce the visibility of subcarrier interference.